ESA Microelectronics Section

This page provides information on the Next Generation Microprocessor (NGMP) development based on LEON4-FT

GR740: The ESA Next Generation Microprocessor (NGMP)

After the preliminary GINA study based on LEON3, completed in 2006, Cobham Gaisler (formerly Aeroflex Gaisler, hereinafter called CG) has started the first development phase of the Next Generation Microprocessor (NGMP) under a TRP contract. This first phase was kicked off in summer 2009, and it comprises the architectural (VHDL) design, verification by simulation and on FPGA. FPGA boards have been made available in 2010. The design is a quad-core LEON4 based microprocessor with L2 cache and numerous peripherals.

The development of Functional Prototypes of the NGMP, called NGFP, has been started in April 2011. These prototypes have been manufactured in 45 nm commercial structured ASIC technology eASIC Nextreme2. While the FPGA prototypes include only a subset of the NGMP features, and their clock frequency is limited to 45 - 70 MHz, the goal of NGFP is to allow functional validation and evaluation by end users of an almost fully fledged NGMP implementation. NGFP contains most of the features of NGMP (except the high speed serial links), and runs at a clock frequency of 150 MHz, which is a good step towards the final space ASIC implementation. Development boards have been made available in 2013 under the product name GR-CPCI-LEON4-N2X.

The implementation into space chip technology was started in Q2/2014, using the C65SPACE platform from ST Microelectronics. Compared to the full NGMP baseline design and the NGFP prototypes, a somewhat modified version has been implemented. The GR740 Advanced Datasheet has been released in April 2015, and manufacturing was started in June 2015. Rad-hard EM prototypes have become available in Q2/2016, validation is currently in progress. This chip will be commercialised under the product number GR740.

GR740 User Day on 28. November 2019, ERASMUS Auditorium, ESTEC


The GR740 processor is now used for various developments, in the frame of ESA or other national and international projects. To facilitate collaboration and to share experience between users, a GR740 User Day will be organised, where invited speakers will present applications of, and experiences with, the GR740 microprocessor.

The event will take place in the Erasmus Auditorium at ESTEC on 28 of November 2019.


The following documents are provided to users

Preliminary Documentation of the NGMP space microprocessor

Documentation of the NGFP 'Functional Prototype' in commercial ASIC technology

Papers and presentations

Related Activities


GR740 Evaluation Box, Jan. 2017

GR740 Evaluation Board at ESA, March 2016

NGFP Evaluation Board

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Last edited 24. May 2019