ERC32 page at ESTEC

The ERC32 Chip Set

The ERC32 Chip Set (TSC691, TSC692, TSC693) is now obsolete, and support has been discontinued by Atmel. For legacy applications, the following documentation is available:

• Hardware and Documentation Status of the ERC32 3-Chipset Microprocessor
• TSC691E IU User Manual Rev I 09/1998
• TSC692E FPU User Manual Rev H 12/1996
• TSC693E MEC User Manual Rev D 04/1997
• ERC32 CBA Chipset Errata Sheet Rev E 03/1999
• ERC32 CCA Chipset Errata Sheet Rev A 10/1998
• ERC32 CDA Chipset Errata Sheet Rev E 03/1999
• Applicability of TSC695F Application Notes or Errata Sheet to ERC32 Chipset (Atmel Ref. 4324D, 07/2006)
• ERC32 Chipset Old Datasheets (Rev G, 10/1996)
• Updated Description and Recommendations for the ERC32 Chip-set Synchronous and Asynchronous Fault Handling and Trap Generation

Proceedings of the ERC32 chipset evaluation workshop at ESTEC, 28. January 1998

The ERC32 Single Chip

The ERC32 Single Chip is available from Atmel under the product code TSC695F. Support and documentation is available from the following sources:

• TSC695F documentation (Atmel site)
• Hardware and Documentation Status of the ERC32 Single Chip
• Technical support E-Mail: sparc-applab.hotline at(@) nto.atmel.com
• ESA Alert System
• Updated Description and Recommendations for the TSC695F Synchronous and Asynchronous Fault Handling and Trap Generation

Miscellaneous documentation related to ERC32

The following supporting documents are provided

• ERC32 Chipset Development - Final Report, Saab Ericsson, 05/1997
• ERC32 System Overview, Saab Ericsson, 04/1997
• ERC32 Memory Controller (MEC) Specification, Saab Ericsson, 04/1997
• SPARC V7 Instruction set (Atmel, 2001)  (old revision 1996)
• ERC32 Instruction timing, J. Gaisler, 11/1995
• Benchmarking of 32-bit processors for space applications, J. Gaisler, 11/1995
• ERC32 Fault Tolerance Concept (FTCS24 paper by J. Gaisler), 1994
• ERC32 SEU Test Report, J. Gaisler, 10/1996
• ERC32 Master-/Checker SEU Test board (Schematic, Layout, Floorplan)

Behavioural Simulation Model (User Manual) -- not synthesisable!