The RISC-V in Space Workshop will be held on 14. Dec 2022
It will be collocated with the GR740 User Day, held on 13. Dec 2022.
Both events will be located at the Erasmus Auditorium at ESTEC.
Participation is free of charge.
Registration is now open
Remote access will be provided for those unable to travel.
The RISC-V in Space Workshop is organized by the ESA Microelectronics Section. The objective is to stimulate the exchange between different parties in Europe, providing or developing space specific microprocessors, IP cores or software solutions based on the RISC-V Instruction Set Architecture.
Contributions from the following companies / institutes are planned:
- Barcelona Supercomputing Centre
- Cobham Gaisler
- Codasip / Menta
- Embedded Brains
- ETH Zürich / University of Bologna
- TAS Italy
- Thales R&T
- Universidad Politecnica de Valencia